The present invention relates to integrated semiconductor circuits and anti-reflective coating fabrication techniques used in dual gate semiconductor technology, such as flash memory technology. More particularly, the present invention relates to integrated semiconductor circuits and fabrication techniques for forming sidewall structure on the sidewalls of the transistor gates used in dual gate semiconductor technology, such as flash memory technology. Even more particularly, the present invention relates to integrated semiconductor circuits and fabrication techniques for forming sidewall structure on the sidewalls of transistor gates in the core memory region as used in dual gate semiconductor technology, such as flash memory technology.
Dual gate technology, such as flash memory technology, uses anti-reflective coatings to ease lithographic patterning. The closely formed dual gate transistor gates require electrical isolation provided by spacers formed on the sidewall structure of the gate stacks. Typically, a dielectric material, similar to the anti-reflective coating material, is used to form the spacers on the sidewall structure of the dual transistor gates. According to known fabrication techniques, the anti-reflective coating is used twice during formation of the spacers, which, as a result of etching and stripping action of the fabrication process, the thickness of the anti-reflective coating is reduced, resulting in a loss of the effectiveness of the anti-reflective coating. Thus, there is seen to exist a need for a fabrication technique that does not depend on deteriorated use of the anti-reflective coating to fabricate the sidewall spacers of dual gate semiconductor devices.
Accordingly, the present invention provides a dual gate semiconductor device, such as a flash memory semiconductor device, whose plurality of dual gate sidewall spacer structures is not formed from traditional dielectric material similar to the anti-reflective coating material that is traditionally used for lithographic patterning. Rather, the present invention provides a dual gate semiconductor structure whose sidewall spacers are formed by a first and second anti-reflection fabrication process, whereby the sidewall spacers of the dual transistor gate structure in the core memory region arm left coated with the second anti-reflective coating material, such as silicon oxynitride (SiON), silicon nitride (Si3N4), and insulator silicon germanium (SiGe), or other material having optical properties compatible with subsequent fabrication processing, to form sidewall spacers for use in subsequent implant and salicidation steps, commonly used during fabrication of the semiconductor device being formed. Other features of the present invention are disclosed or are apparent in the section entitled xe2x80x9cDETAILED DESCRIPTION OF THE INVENTION.xe2x80x9d